RonenCircuts

Electrical engineer with 3 years of experience in the global multidisciplinary high-tech
industry.
Experience in signoff STA flows of advanced processes.
Deep understanding of timing.
Experience in high-performance, high-frequency, and low-power designs.
VLSI Design Engineer with experience in Back End Design (transistor level).
Knowledge - LT-Spice, System Verilog, VHDL, C, C++, Python.
Strong analytical skills, detail oriented.
Analysis and fixing timing issues.
Layout – place, and route.
Design correctness - RTL vs schematic (FEV – formal equivalence verification).